Today’s fast paced world has created a society that relies heavily on technology, with demands for new and improved gadgets growing ever more challenging. Whether we are ‘on-to-go’ or staying at home, the number of electronic devices we use to automate our lives has exploded in past decades. Both our need and want for fast, small, interconnected devices continues to grow. Over the past year, as the COVID-19 pandemic has forced millions more people towards working, studying and socialising online, our reliance on technology has become even more pronounced.
One of the factors that played an important role in the expansion of electronic devices was their size or, more specifically, their portability. When on-the-go, we need small devices we can easily carry to stay connected wherever we are, while at home smaller devices have the advantage of being easily moved from one room to the other. Size must never compromise a device’s performance, however, and so technology has had to find ways to improve both aspects simultaneously. Small, lightweight, flexible and yet powerful phones, laptops, tablets and other devices are in high demand, not only in our pockets and homes, but also for aerospace technology, medical applications, the military and the security sector.
Shrinking the size of electronic devices while maintaining, or even enhancing, their performance is no easy task, however. The small electrical switches that allow devices to function, called transistors, are commonly made of silicon. The smallest transistors manufactured today are only approximately 70 nanometres across, with one nanometre corresponding to 0.000000001 meters. In other words, the smallest transistors to date are only approximately 700 silicon atoms long.
The smaller each individual transistor is, the more of them we can pack onto an integrated electrical circuit, resulting in faster and smaller devices. The number of transistors that can be placed onto an integrated circuit has been doubling every two years, a trend that has been so constant since the 1970s that it has been named ‘Moore’s law’. But with the size of transistors fast approaching the size of a single silicon atom, soon we will reach the limit at which the transistor becomes too small to function, and that will set the limit to how small transistors, and hence devices, can be.
To further shrink electronic devices and to lower energy consumption, the semiconductor industry is now turning to 1D and 2D materials. Manufacturers need a quick and accurate method for tailoring these fragile materials on nanoscale, however. In addition, atomically thin graphene sheet is not a semiconductor unless its width is reduced to just a few nanometers. A sheet of multi-walled carbon nanotubes can act as a perfect resistor with extremely low noise. The challenge is that it must be precisely patterned.
Pushing the limits with low-dimensional nanostructures
To go beyond this scalability limitation, new materials are needed. Carbon nanotubes, graphene and 2D nanostructures are leading candidate materials for new generation electronics. This material offers good electrical conductivity, demonstrating either semiconducting or metallic properties, depending on the precise arrangement of atoms along the structure and dimension. These nanostructures are also chemically stable, very strong and stiff, making them good candidates for incorporation into robust and versatile devices.
…current methods to introduce a patterned structure onto nanomaterials are not adequate for carbon nanotube sheets, hindering their widespread use in future electronics.
By providing atomically thin, nanoscale structures that still guarantee superior electron transport, these nanostructures offer exciting opportunities for electronic and optic technologies that could launch the next generation of electronic devices. The good thermal conductivity of carbon nanotubes and graphene could also make them useful in dealing with the heat generated on small devices. The use of carbon nanotubes and graphene has already proven to be useful in flexible circuits, low-cost displays and a variety of sensors, and hence expanding their application to other, new electronic devices is of great interest.
Carbon nanotubes are usually manufactured in sheets of continuous and aligned nanotube ‘forests’. This ‘forest’ material is a perfect blackbody – it absorbs all light it interacts with completely – a characteristic that is in high demand for various applications, such as to calibrate space telescopes or to direct light in blood-sugar sensors. While carbon nanotube sheets can themselves be used in electrical circuits, a patterned structure is often beneficial or even required for certain technological applications. For conductive transparency films, for example, patterning is needed to create small micro-pads for touch-pad screens, and many other applications require carbon nanotubes to be patterned into precise networks. However, current methods to introduce a patterned structure onto nanomaterials are not adequate for carbon nanotube sheets, which currently hinders their widespread use in future electronics. To address this challenge, Ali Aliev and Ray Baughman have developed a non-contact dry-state patterning technology.
Electron emission for nanomaterials
Ali Aliev and Ray Baughman of the Alan G. MacDiarmid NanoTech Institute at The University of Texas, Dallas, have developed a non-contact technique to introduce patterns onto sheets of carbon nanotubes, as well as other conducting materials. Instead of drawing or printing a pattern of material onto a surface, Aliev and Baughman’s technique takes a sheet of carbon nanotubes and ‘scratches’ it (through electron emission, not physical contact) in order to create a pattern. Because this is a dry patterning technique, with no need for any wet chemistry to take place, the use of harsh solvents is avoided and the chance of contaminants in the final product is also lowered.
Their method presents a promising avenue towards the application of carbon nanotubes to electronic and optical devices.
In a recent publication in the journal Nanotechnology, Ali Aliev and Ray Baughman present the technique in more detail. The tip of a tungsten wire with curvature radius only 50-80 nm is brought very close to a carbon nanotube sheet, being only 20 to 30 nm away but never really touching the surface. A voltage of only 25-30 V is applied to the tungsten wire which can either have a positive or negative polarity. Electron emission, which is enhanced by field localisation on nanoscaled conductive objects, then takes place through the atmospheric gas between the tungsten wire and the carbon nanotube sheet. At these close distances, there are only a few air molecules between the tungsten tip and the object. This allows for electrons to be accelerated by the electrical field localized at the nanoscale object, meaning that electron emission can happen in normal ambient pressure with this technique, avoiding the need for high vacuum environments that is common for electron emission techniques. The electrons emitted interact with carbon nanotubes and decompose those surrounding the tungsten wire, resulting in gaps of ~200 nm with a precision of 20 nm or less. The preciseness of the pattern is limited by the sharpness of the tungsten wire so that, in fact, this precision can be further improved down to approximately 10 nm.
Fine tuning of the voltage applied to the tungsten wire allows for a refinement of the results achieved, and the choice between a positive or negative tungsten tip depends on the specific application. For example, a positive polarity of the tungsten tip yields clean and precisely patterned nanostructured materials, while a negative tip allows for fast cutting without formation of debris. In general, this delicate technique allows for 10 cm of nanoscale precision patterns to be drawn onto conducting materials every second.
After successful proof-of-concept studies for carbon nanotube sheets, the authors also tested their technique on other conducting nanostructures. Their publication reports on the results of successful patterning via electron emission in both 2D and 3D structures, namely graphene, graphene sponge and MXenes, a material that consists of layers of a few atoms of transition metal carbides, nitrides, or carbonitrides. The reported dry patterning technique is, therefore, very versatile, and the authors report having employed it to fabricate multi-electrode sensors, photonic crystals and various electronic components.
The dry patterning electron emission technique developed by Aliev and Baughman allows for the fabrication of precise nanostructured conducting materials which are largely free of contaminants or structural defects. Their method presents a promising avenue towards the application of carbon nanotubes to electronic and optical devices. The expansion of carbon nanotube applications could, in turn, facilitate the expansion of the technology that will push our current limits and allow us to continue to pack more computing power into ever smaller electronic footprints.
What was the main challenge in developing this technique?
All observed parameters and behaviour of patterning current were point on the electron emission. However, to prove the electron emission concept the distance dependence of current should be directly measured and compared with existing theories. To move the tungsten tip in the gap of 20-50 nm with precision of 10 nm and control the increase of emission current is a main challenge that needed a reproducibility of that result in at least three different environments: vacuum, nitrogen and air.